Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2011-02-15
2011-02-15
Cho, James (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S031000, C327S538000
Reexamination Certificate
active
07888970
ABSTRACT:
A switch controlling circuit, which comprises: a frequency programmable clock signal generator and a plurality of registers. The frequency programmable clock signal generator serves to generate a frequency controllable clock signal. The registers comprises: a first stage register, for receiving an input signal and the frequency controllable clock signal, and for outputting a first output signal, which is utilized to control a first switch device, according to the input signal and the frequency controllable clock signal; and a second stage register, for receiving the first output signal and the frequency controllable clock signal, and for outputting a second output signal, which is utilized to control a second switch device, according to the first output signal and the frequency controllable clock signal.
REFERENCES:
patent: 3604947 (1971-09-01), Puthuff
patent: 5391938 (1995-02-01), Hatsuda
patent: 7365595 (2008-04-01), Lee
patent: 2007/0273412 (2007-11-01), Yoshida et al.
patent: 2009/0066681 (2009-03-01), Kim et al.
Cho James
Faraday Technology Corp.
Hsu Winston
Margo Scott
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