Obtaining configuration data for a data processing apparatus
Off-chip signal routing between multiply-connected on-chip...
On-board clock-control templates for testing integrated...
On-chip clock generator allowing rapid changes of on-chip...
One-wire approach and its circuit for clock-skew compensating
Operation and maintenance of clock distribution networks...
Operation mode scheduling
Optimum stable composite clock network
Output buffer having a plurality of switching devices being...
Over-clocking detection system utilizing a reference signal...
Overclock detection
Overclock detection
Oversampling-based scheme for synchronous interface...
Packet processing system and method for a data transfer node...
Parallel data communication having skew intolerant data groups
Parallel data communication realignment of data sent in...
Parallel data transfer method and system of DDR divided data...
Parallel path alignment method and apparatus
Parallel path alignment method and apparatus
Parallel processing integrated circuit tester