Parallel data transfer method and system of DDR divided data...

Details Parallel data transfer method and system of DDR divided data... Parallel data transfer method and system of DDR divided data...

2005-05-24

2005-05-24

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S502000, C713S600000

Reexamination Certificate

active

06898722

ABSTRACT:
A data transfer method allowing improved data transfer speed without increasing the number of signal lines is disclosed. After dividing data to be transferred into odd-numbered data and even-numbered data, the odd-numbered data are sequentially read at timing of a leading edge of each clock pulse and the even-numbered data are sequentially read at timing of a trailing edge of each clock pulse. Thereafter, a data transfer completion indicator is appended to one of the odd-numbered and even-numbered data strings. A transfer clock signal includes a fixed-level pulse in a period of time corresponding to the data transfer completion indicator. The one of the odd-numbered and even-numbered data strings followed by the data transfer completion indicator, the other of the odd-numbered and even-numbered data strings, and the transfer clock signal are transferred through different signal lines.

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