Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2007-04-26
2010-11-16
Bae, Ji H (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S400000, C710S061000
Reexamination Certificate
active
07836324
ABSTRACT:
In one embodiment, an apparatus to synchronously communicate on an interface that has an associated interface clock for a circuit that has an internal clock used internal to the circuit comprises a control circuit coupled to receive the internal clock and the interface clock. The control circuit is configured to sample the interface clock multiple times per clock cycle of the internal clock and to detect a phase difference, to a granularity of the samples, between the internal clock and the interface clock. The apparatus comprises a data path that is configured to transport data between an internal clock domain and an interface clock domain. The data path is configured to provide at least two different timings on the transported data relative to the internal clock. The control circuit is coupled to the data path and is configured to select one of the timings responsive to a detected phase difference.
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Ananthanarayanan Priya
Biswas Sukalpa
Kaenel Vincent R. von
Subramanian Sridhar P.
Apple Inc.
Bae Ji H
Merkel Lawrence J.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
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