Local skew detecting circuit for semiconductor memory apparatus
Logic circuit and semiconductor integrated circuit
Low phase jitter clock signal generation circuit
Low power memory controller with leaded double data rate...
Low power memory controller with leaded double data rate...
Low-speed DLL employing a digital phase interpolator based...
Maintaining processor execution during frequency transitioning
Majority vote circuit for test mode clock multiplication
Managing instruction execution in order to accommodate a...
Managing timers in a multiprocessor environment
Manipulating an integrated circuit clock in response to...
Marginless status determination circuit
Measuring elapsed time for a software routine
Measuring timing margins in digital systems by varying a...
Memory card control chip
Memory card having memory device and host apparatus...
Memory clock generator and method therefor
Memory control chip, control method and control circuit
Memory controller having receiver circuitry capable of...
Memory controller receiver circuitry with tri-state noise...