Memory controller having receiver circuitry capable of...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing

Reexamination Certificate

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C713S501000, C711S167000, C711S154000, C711S105000, C365S233100, C365S193000

Reexamination Certificate

active

07103793

ABSTRACT:
A double data rate memory controller is provided with a plurality of data and strobe pads, means for receiving data and strobe signals via said pads at 1x double data rate memory speed, and means for receiving data and strobe signals via said pads at Mx double data rate memory speed (M2).

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