Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Reexamination Certificate
2007-04-24
2007-04-24
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Counting, scheduling, or event timing
C713S400000, C713S500000, C713S501000, C713S600000
Reexamination Certificate
active
10180836
ABSTRACT:
An embodiment of the present invention includes a standby clock generator and a selector. The standby clock generator generates a standby clock synchronous to a core clock. The core clock is generated by a core clock generator during a normal operation mode. The core clock generator stops the core clock during a frequency transition. The selector generates a processor clock from the standby clock during the frequency transition from the normal operation mode according to a selector control signal.
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Derhalli Islam
George Varghese
Jahagirdar Sanjeev
Mangrulkar Kedar
Nazareth Mathew
Lee Thomas
Tran Vincent
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