Code sequence for asynchronous backing store switch utilizing bo

Coding standard token in a system compromising a plurality of pi

Collation of interrupt control devices

Combined associative processor and random access memory...

Combined branch prediction and cache prefetch in a microprocesso

Combined Instruction and address caching system using...

Combining ALU and memory storage micro instructions by using an

Combining hardware and software to provide an improved microproc

Combining results of selectively executed remaining...

Command execution controlling apparatus, command execution...

Command ordering among commands in multiple queues using...

Command protocol for integrated circuits

Command supply device that supplies a command read out from...

Common feature mode for microprocessors in a multiple...

Common-thread inter-process function calls invoked by jumps...

Communicating signals between semiconductor chips using...

Communication bus with hidden pre-fetch registers

Communication link control among inter-coupled multiple...

Communication link control among inter-coupled multiple...

Communication path to each part of distributed register file...