Combining ALU and memory storage micro instructions by using an

Electrical computers and digital processing systems: processing – Processing control – Processing sequence control

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G06F 928

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active

059833440

ABSTRACT:
An apparatus and method for improving the execution speed of macro instructions which have an operand located in memory, and where the destination of the result is in memory. The apparatus includes an ALU Store which monitors micro instructions generated by a translator. When a macro instruction is fetched which has an operand located in memory, and the result is to be stored in the same location in memory, the translator generates a LOAD micro instruction followed immediately by an operation micro instruction which contains STORE indicia, such as a STORE suffix. The ALU Store latches the address created by the LOAD micro instruction, and uses this latched address in the following operation store micro instruction.

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patent: 5317701 (1994-05-01), Reininger et al.
Hamacher et al., Computer Organization, Second Edition, McGraw-Hill Series in Computer Organization and Architecture, pp. 146-158, 1984.

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