Communication bus with hidden pre-fetch registers

Details Communication bus with hidden pre-fetch registers Communication bus with hidden pre-fetch registers

2006-09-08

2010-11-02

Kindred, Alford W (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Reexamination Certificate

active

07827387

ABSTRACT:
A system-on-chip (SOC) includes a processor, a controller module for a hard disk drive, and a communication bus that provides a communication link between the processor and the controller module. The communication bus includes a multiplexer that includes an output and an input that receives data from a selected one of N registers associated with the controller module and propagates the data to the output, M address registers that store addresses of up to M ones of the N registers, M data registers that receive pre-fetch data that corresponds to the data from the output from the M ones of the N registers, and a second multiplexer that includes a second output and that reads the pre-fetch data from the M data registers and propagates the pre-fetch data to the second output. M and N are positive integers greater than two and N is greater than M.

REFERENCES:
patent: 6738867 (2004-05-01), Kanai

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