Stall-free pipelined cache for statically scheduled and...

Stalling predicted prefetch to memory location identified as unc

Standard cell, 4-cycle, 8-bit microcontroller

Start of access instruction configured to indicate an access mod

State machine based filtering of non-dominant branches to...

State machine controller capable of producing result per clock c

Static branch prediction mechanism for conditional branch...

Static branch prediction mechanism for conditional branch...

Static branch predictor using opcode of instruction...

Static instruction decoder utilizing a circular queue to decode

Status register associated with MMX register file for...

Status register update logic optimization

Stick and spoke replay with selectable delays

Stitching parcels

Stopping replay tornadoes

Storage medium driving device, storage medium and data...

Storage medium storing calculation processing visualization...

Storage system for use in custom loop accelerators and the like

Store instruction ordering for multi-core processor

Store load forward predictor training