Stalling predicted prefetch to memory location identified as unc

Details Stalling predicted prefetch to memory location identified as unc Stalling predicted prefetch to memory location identified as unc

1998-05-07

2000-03-07

Kim, Kenneth S.

Electrical computers and digital processing systems: processing

Processing control

Branching

712 23, 712239, 711207, 711213, G06F 932

Patent

active

060353937

ABSTRACT:
A computer system includes an instruction prefetching mechanism that detects whether an instruction to be prefetched is located in a region of memory that is uncacheable. To perform an instruction prefetch, an instruction fetch unit (IFU) receives an instruction pointer indicating a memory location containing an instruction to be prefetched. The instruction pointer may be provided by a branch target buffer (BTB) as a result of a branch prediction, or by auxiliary branch prediction mechanisms, or actual execution. The IFU accesses an instruction translation look-aside buffer (ITLB) to determine both the physical address corresponding to the linear address of the instruction pointer and to determine an associated memory type stored therein. If the memory type indicates an uncacheable memory location, the IFU waits until all previous executed instructions have completed. The IFU does this by inserting a "permission-to-fetch" instruction, and then stalling. The IFU remains stalled until either the permission-to-fetch instruction retires or until a branch misprediction is detected. Once a branch misprediction is detected, the permission-to-fetch instruction and all other instructions issued subsequent to the mispredicted branch are squashed. If no previous branch mispredictions are detected, the permission-to-fetch instruction eventually retires, the instruction pointer is reset based on the correct branch, and prefetching continues.

REFERENCES:
patent: 5680565 (1997-10-01), Glen et al.
patent: 5751996 (1998-05-01), Glen et al.
patent: 5864692 (1999-01-01), Faraboschi et al.

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