Forwarding the results of operations to dependent...
Four stage pipeline processing for a microcontroller
FPGA based configurable CPU additionally including second progra
FPGA co-processor for accelerated computation
FPGA input output buffer with registered tristate enable
FPGA input output buffer with registered tristate enable
Function-variable type digital signal processing apparatus,...
Functional bit identifying a prefix byte via a particular state
Functional-level instruction-set computer architecture for...
Functional-level instruction-set computer architecture for...
Fusing load and alu operations
Fusing load and alu operations
Fusion of processor micro-operations