Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
Reexamination Certificate
2007-08-07
2007-08-07
Zand, Kambiz (Department: 2134)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to accommodate variable length...
C712S225000, C712S003000, C712S004000, C345S505000
Reexamination Certificate
active
10248029
ABSTRACT:
A functional-level instruction-set computing (FLIC) architecture executes higher-level functional instructions such as lookups and bit-compares of variable-length operands. Each FLIC processing-engine slice has specialized processing units including a lookup unit that searches for a matching entry in a lookup cache. Variable-length operands are stored in execution buffers. The operand length and location in the execution buffer are stored in fixed-length general-purpose registers (GPRs) that also store fixed-length operands. A copy/move unit moves data between input and output buffers and one or more FLIC processing-engine slices. Multiple contexts can each have a set of GPRs and execution buffers. An expansion buffer in a FLIC slice can be allocated to a context to expand that context's execution buffer for storing longer operands. The FLIC engine is optimized to parse, lookup, and process long strings common in content-service requests and can offload file-server requests by looking up meta-data and pointers.
REFERENCES:
patent: 4229801 (1980-10-01), Whipple
patent: 4724517 (1988-02-01), May
patent: 4876643 (1989-10-01), McNeill et al.
patent: 4985848 (1991-01-01), Pfeiffer et al.
patent: 5127098 (1992-06-01), Rosenthal et al.
patent: 5148528 (1992-09-01), Fite et al.
patent: 5161193 (1992-11-01), Lampson et al.
patent: 5212778 (1993-05-01), Dally et al.
patent: 5317746 (1994-05-01), Watanabe
patent: 5428779 (1995-06-01), Allegrucci et al.
patent: 5737523 (1998-04-01), Callaghan et al.
patent: 5768575 (1998-06-01), McFarland et al.
patent: 5774739 (1998-06-01), Angle et al.
patent: 5793371 (1998-08-01), Deering
patent: 5802366 (1998-09-01), Row et al.
patent: 5842004 (1998-11-01), Deering et al.
patent: 5854913 (1998-12-01), Goetz et al.
patent: 5870094 (1999-02-01), Deering
patent: 5909565 (1999-06-01), Morikawa et al.
patent: 5917821 (1999-06-01), Gobuyan et al.
patent: 5995961 (1999-11-01), Levy et al.
patent: 6028610 (2000-02-01), Deering
patent: 6034963 (2000-03-01), Minami et al.
patent: 6108663 (2000-08-01), Kableshkov
patent: 6128641 (2000-10-01), Fleck et al.
patent: 6304954 (2001-10-01), Munson
patent: 6330584 (2001-12-01), Joffe et al.
patent: 6349379 (2002-02-01), Gibson et al.
patent: 6356863 (2002-03-01), Sayle
patent: 6374326 (2002-04-01), Kansal et al.
patent: 6389479 (2002-05-01), Boucher et al.
patent: 6427173 (2002-07-01), Boucher et al.
patent: 6498571 (2002-12-01), Molloy
patent: 6532012 (2003-03-01), Deering
patent: 6545686 (2003-04-01), Fadden
patent: 6883068 (2005-04-01), Tsirigotis et al.
patent: 2001/0054140 (2001-12-01), Oberman et al.
patent: 2002/0038416 (2002-03-01), Fotland et al.
patent: 2003/0005268 (2003-01-01), Catherwood
patent: 2004/0193835 (2004-09-01), Devaney et al.
File, Definition, <URL:http://searchexchange.techtarget.com/sDefinition/0,290660,sid43—gci212118,00.html> Retrieved online Feb. 16, 2006.
Kharidia Mehul
Mertoguno J. Sukarno
Mittal Millind
Tripathy Tarun Kumar
Alacritech, Inc.
Lauer Mark
Silicon Edge Law Group LLP
Szymanski Thomas
Zand Kambiz
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