Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
Reexamination Certificate
2008-07-08
2008-07-08
Kindred, Alford (Department: 2181)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to accommodate plural instruction...
C712S243000, C712S244000, C712S211000, C712S024000
Reexamination Certificate
active
10180391
ABSTRACT:
Fusing a load micro-operation (uop) together with an arithmetic uop. Intra-instruction fusing can increase cache memory storage efficiency and computer instruction processing bandwidth within a microprocessor without incurring significant computer system cost. Uops are fused, stored in a cache memory, un-fused, executed in parallel, and retired in order to optimized cost and performance.
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Hinton Glenn J.
Jourdan Stephan J.
Sager David J.
Samra Nicholas G.
Kindred Alford
Metzger Erik M.
Moll Jesse
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