Mechanism for irrevocable transactions
Mechanism for recovery from termination of a program...
Mechanism for self-initiated instruction issuing and method...
Mechanism for using performance counters to identify reasons...
Mechanism to determine actual code execution flow in a computer
Mechanism to save and restore cache and translation trace...
Memory access address comparison of load and store queques
Memory access consolidation for SIMD processing elements...
Memory controller having front end and back end channels for...
Memory organization allowing single cycle pointer addressing...
Memory shared between processing threads
Memory store from a register pair conditional upon a selected st
Merging branch information with sync points
Merging single precision floating point operands
Mesh connected computer
Message synchronization in network processors
Method and a system for using same set of registers to...
Method and apparatus for a register renaming structure
Method and apparatus for a stew-based loop predictor
Method and apparatus for accelerated instruction restart in a mi