Memory access consolidation for SIMD processing elements...

Details Memory access consolidation for SIMD processing elements... Memory access consolidation for SIMD processing elements...

2008-04-22

2008-04-22

Huisman, David J (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Processing control for data transfer

C712S022000, C711S150000

Reexamination Certificate

active

07363472

ABSTRACT:
A data processing apparatus includes a SIMD (Single Instruction Multiple Data) array (10) of processing elements. The processing elements are operably divided into a plurality of processing blocks, the processing blocks being operable to process respective groups of data items.

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Jeng et al.: “A fault-tolerant multistage interconnection network for multiprocessor systems using dynamic redundancy”, 6thInternational Conference on Distributed Computing Systems Proceedings, pp. 70-77; see INSPEC abstract No. C86052412.

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