Heterogeneous parallel multithread processor (HPMT) with...
High priority guard transfer for execution control of...
High speed multi-threaded reduced instruction set computer...
High-throughput interface between a system memory controller...
Holding mechanism for changing operation modes in a pipelined co
Hybrid branch prediction device with two levels of branch...
Hybrid branch prediction using a global selection counter...
Hybrid branch predictor having negative ovedrride signals
Hybrid branch predictor with improved selector table update...