Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2006-04-04
2006-04-04
Treat, William M. (Department: 2181)
Electrical computers and digital processing systems: processing
Processing control
Branching
C712S237000
Reexamination Certificate
active
07024545
ABSTRACT:
A processor is configured with a first level branch prediction cache configured to store branch prediction information corresponding to a group of instructions. In addition, a second level branch prediction cache is utilized to store branch prediction information which is evicted from the first level cache. The second level branch prediction cache is configured to store only a subset of the information which is evicted from the first level cache. Branch prediction information which is evicted from the first level cache and not stored in the second level cache is discarded. Upon a miss in the first level cache, a determination is made as to whether the second level cache contains branch prediction information corresponding to the miss. If corresponding branch prediction information is detected in the second level cache, the detected branch prediction information is used to rebuild complete branch prediction information.
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Roberts James S.
Zuraski, Jr. Gerald D.
Advanced Micro Devices , Inc.
Meonske Tonia L.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Rankin Rory D.
Treat William M.
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