Branch target buffer addressing in a data processor

Branch target cache and method for efficiently obtaining...

Branch target prediction for multi-target branches by...

Branching around conditional processing if states of all...

Branching in a computer system

Call gate expansion for 64 bit addressing

Central processing unit architecture with multiple pipelines...

Central processing unit having branch instruction...

Checking for exception by floating point instruction...

Circuit and method for initiating exception routines using...

Circuit and method for tagging and invalidating...

Circuit arrangement and method of speculative instruction...

Circuit for controlling execution of loop in digital signal...

Circuitry and method for performing branching without pipeline d

Circuits, systems and methods for performing branch...

Combined branch prediction and cache prefetch in a microprocesso

Compare and branch mechanism

Compiling method of accessing a multi-dimensional array and syst

Compiling strong and weak branching behavior instruction blocks

Compressed instruction format for use in a VLIW processor