Macroscalar processor architecture

Macroscalar processor architecture

Map unit having rapid misprediction recovery

Mechanism for delivering precise exceptions in an...

Mechanism for error handling in a computer system

Mechanism for executing computer instructions in parallel

Mechanism for handling failing load check instructions

Mechanism for hardware tracking of return address after tail...

Mechanism to determine actual code execution flow in a computer

Method and apparatus for a stew-based loop predictor

Method and apparatus for accelerated instruction restart in a mi

Method and apparatus for affecting subsequent instruction proces

Method and apparatus for affecting subsequent instruction...

Method and apparatus for allocating entries in a branch...

Method and apparatus for an efficient multi-path trace cache...

Method and apparatus for analyzing code for out-of-range...

Method and apparatus for branch execution on a multiple-instruct

Method and apparatus for branch instruction processing in a...

Method and apparatus for branch prediction based on branch...

Method and apparatus for branch prediction using first and...