Identification and correction of cyclically recurring errors...

Implementation of a conditional move instruction in an...

Implementation of an efficient instruction fetch pipeline...

Incorporating local branch history when predicting multiple...

Incorporating trigger loads in branch histories for branch...

Indexed table circuit having reduced aliasing

Indexing branch target instruction memory using target...

Information processing apparatus and exception control circuit

Information processing apparatus and exception control circuit

Information processing apparatus provided with branch...

Information processing apparatus which accurately predicts wheth

Information processing apparatus, method, and...

Information processing method and instruction generating method

Information processing unit, and exception processing method...

Information processing unit, and exception processing method...

Information processor having delayed branch function with...

Input replicator for interrupts in a simultaneous and...

Instruction buffer for issuing instruction sets to an...

Instruction cache configured to provide instructions to a microp

Instruction control method and processor to process...