Compiling strong and weak branching behavior instruction blocks

Details Compiling strong and weak branching behavior instruction blocks Compiling strong and weak branching behavior instruction blocks

1998-04-30

2000-09-05

Kim, Kenneth S.

Electrical computers and digital processing systems: processing

Processing control

Branching

717 5, 717 8, G06F 1500

Patent

active

061158097

ABSTRACT:
A method and apparatus varies branch prediction strategy associated with branch instructions in a trace of program code. The present invention first profiles branch instructions within a trace to record branching behavior. Next, the present invention partitions branch instructions into groups of branch instructions that can be statically predicted and groups of branch instructions that can be dynamically predicted. Branch instructions that are profiled to have "strong" branching behavior (e.g., the same branch direction is taken 80% of the time) are placed in the group of branch instruction that are statically predicted. Branch instructions that are profiled to have "weak" branching behavior (e.g., the same branch direction is taken 60% of the time) are placed in the group of branch instruction that are dynamically predicted. Finally, branch instructions are adjusted by associating an indication of prediction strategy with each profiled branch instruction. In an embodiment of the present invention, dynamic and static code caches are defined in physical memory by allocating pools of memory pages that have prediction flags set to dynamic and static, respectively. In this embodiment, the trace is translated into the dynamic and static caches by moving branch instruction and basic blocks of code associated with branch instructions into the appropriate code cache based on the groups into which the branch instructions were partitioned. The present invention may be used when a program is originally compiled or when a program is recompiled after a profile-based optimization run. Additionally, the present invention may be used as part of a run-time optimization strategy.

REFERENCES:
patent: 5659752 (1997-08-01), Heisch et al.
patent: 5687360 (1997-11-01), Chang
patent: 5752014 (1998-05-01), Mallick et al.
patent: 5805878 (1998-09-01), Rahman et al.
patent: 5857104 (1999-01-01), Natarjan et al.
patent: 5933628 (1999-08-01), Chang

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