Paired load-branch operation for indirect near jumps

Performing pending interrupts or exceptions when interruptible j

Pipeline controller for context-based operation...

Pipeline having bifurcated global branch history buffer for...

Pipeline processing apparatus for reducing delays in the perform

Pipeline processor capable of reducing branch hazards with...

Pipeline replay support for unaligned memory operations

Pipeline stall reduction in wide issue processor by...

Pipelined asynchronous processing

Pipelined central processor managing the execution of...

Pipelined data processing including program counter recycling

Pipelined microprocessor with efficient self-modifying code dete

Pipelined microprocessor, apparatus, and method for...

Pipelined processor and method using a profile register...

Pipelined processor executing logical or mathematical...

Pipelined processor method and circuit with interleaving of...

Pipelined two-cycle branch target address cache

Pre-prefetching target of following branch instruction based...

Precise counter hardware for microcode loops

Precoding branch instructions to reduce branch-penalty in...