Microprocessor circuits, systems, and methods for issuing succes

Microprocessor for controlling the conditional execution of inst

Microprocessor for overlapping stack frame allocation with...

Microprocessor having a branch predictor using speculative...

Microprocessor having delayed instructions with variable...

Microprocessor having main processor and co-processor

Microprocessor including return prediction unit configured...

Microprocessor processing specified instructions as operands

Microprocessor protected against parasitic interrupt signals

Microprocessor system for simultaneously accessing multiple...

Microprocessor that detects erroneous speculative prediction...

Microprocessor with a nestable delayed branch instruction withou

Microprocessor with an instruction immediately next to a...

Microprocessor with branch target address cache update queue

Microprocessor with branch-decrement instruction that...

Microprocessor with circuits, systems and methods for...

Microprocessor with customer code store

Microprocessor with EIT, processing capability, and EIT...

Microprocessor with microinstruction-specifiable...

Microprocessor with rate of instruction operation dependent upon