Superscalar processor for retiring multiple instructions in work

Superscalar processor with parallel issue and execution device h

Superscalar RISC instruction scheduling

Superscalar RISC instruction scheduling

Superscalar RISC instruction scheduling

Supplying instruction stored in local memory configured as...

Switch complex selectively coupling input and output of a...

Switch coupled function blocks with additional direct...

Switch memory architectures

Switching multi-initiator SCSI devices to a singular target bus

Synchronization and control system for an arrayed processing eng

Synchronization between pipelines in a data processing...

Synchronization method for work distribution in a multiprocessor

Synchronous periodical orthogonal data converter

System and method for accelerating web site access and...

System and method for acceleration of streams of dependent...

System and method for adaptive run-time reconfiguration for...

System and method for addressing plurality of data values with a

System and method for assigning tags to control instruction proc

System and method for assigning tags to control instruction...