Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2007-01-16
2009-11-17
Treat, William M (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S034000, C712S036000
Reexamination Certificate
active
07620796
ABSTRACT:
A system and method for accelerated processing of streams of dependent instructions, such as those encountered in the G.726 codec, in a microprocessor or microprocessor-based system/chip. In a preferred implementation, a small RISC-like special purpose processor is implemented within a larger general purpose processor for handling the streams of dependent instructions.
REFERENCES:
patent: 2004/0003215 (2004-01-01), Krimer et al.
patent: 2006/0212678 (2006-09-01), De Oliveira
Ye et al., “Chimaera: A High-Performance Architecture with a Tightly-Coupled Reconfigurable Functional Unit”, Proceedings of the 27thAnnual Symposium on Computer Architecture, IEEE, Jun. 10-14, 2000, pp. 225-235.
Singh et al., “MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive Applications”, IEEE Transactions on Computers, May 2000, vol. 49, iss. 5, pp. 465-481.
Burr Alexander J.
Wilson Sophie M.
Broadcom Corporation
Sterne Kessler Goldstein & Fox PLLC
Treat William M
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