Backplane system having high-density electrical connectors
Backup redundant routing system crossbar switch architecture...
Banked shadowed register file
Barrier synchronization mechanism for processors of a...
Barrier synchronization method, device, and multi-core...
Bidirectional communication port for digital signal processor
Bit manipulation instructions
Bit-slice processing unit having M CPU's reading an N-bit width
Boundary synchronization mechanism for a processor of a...
Branch instruction having different field lengths for...
Branch recovery mechanism to reduce processor front end stall ti
Broadcast invalidate scheme
Building a wavecache
Byte execution unit for carrying out byte instructions in a...