Electrical computers and digital processing systems: processing – Processing architecture – Superscalar
Patent
1997-08-29
1999-08-31
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Processing architecture
Superscalar
712 1, 712 5, 712 10, 712 16, 712214, 712215, G06F 930
Patent
active
059448113
ABSTRACT:
In a superscalar processor for fetching a prescribed peak number of instructions in parallel in each period until such instructions are fetched to a predetermined peak number, such as ten, an instruction parallel issue and execution administrating device comprises a forward map buffer for a forward map indicative of a result of each instruction for use as an operand by which one of other instructions of the predetermined peak number. The forward map is developed before the result is actually produced and is used, after the actual production, to indicate which one of such results should be used as the operand by the above-mentiond one of the other instructions.
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Mike Johnson, Superscalar Microprocessor Design, Prentice Hall, Chapter 3, pp. 31-55, Jan. 1991.
An Meng-Ai T.
NEC Corporation
Nguyen Dzung C.
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