Facilitating inter-DSP data communications

Facilitating inter-DSP data communications

Fast conversion of encoded tag bits

Fast sparse list walker

Field programmable gate array and microcontroller...

Field programmable gate array and microcontroller...

Field programmable processor using dedicated arithmetic...

File replication methods and apparatus for reducing port...

Flag bits evaluation for multiple vector SIMD channels...

Flexible demand-based resource allocation for multiple...

Flexible digital signal processor

Flexible results pipeline for processing element

Flexible scheduling of non-speculative instructions

Floating-point unit which utilizes standard MAC units for...

Flow optimization and prediction for VSSE memory operations

Flow optimization and prediction for VSSE memory operations

FPGA based configurable CPU additionally including second progra

FPGA co-processor for accelerated computation

FPGA input output buffer with registered tristate enable

FPGA input output buffer with registered tristate enable