System and method for prioritizing arithmetic instructions
System and method of using speculative operand sources in...
System to dispatch several instructions on available...
Time-of-life counter design for handling instruction flushes...
Unified buffer for tracking disparate long-latency...
Unified multi-function operation scheduler for out-of-order...
Variable length pipeline processor architecture
Very long instruction word microprocessor with execution...
VLIW processor and method therefor
Voltage droop mitigation through instruction issue throttling