LandOfFree - US Patents - Listing for Electrical computers and digital processing systems: processing ,Dynamic instruction dependency checking, monitoring or...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Reorder buffer which forwards operands independent of storing de

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass

Reordering serial data in a system with parallel processing...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Reservation stations to increase instruction level parallelism

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Resolving dependencies among concurrently dispatched...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Resource management using multiply pendent registers

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass

Result forwarding of either input operand to same operand...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Retaining flag value associated with dead result data in...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass

Retiring early-completion instructions to improve computer...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble

Retiring early-completion instructions to improve computer...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass

Retiring instructions that meet the early-retirement...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Run-time parallelization of loops in computer programs by...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Runtime critical load/data ordering

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Scan chains for out-of-order load/store execution control

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble

Scheduling instructions in a cascaded delayed execution...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Scheduling instructions with different latencies

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Scheduling operations using a dependency matrix

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Scoreboard mechanism for serialized string operations...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass

Secondary reorder buffer microprocessor

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...

Segmented pipeline flushing for mispredicted branches