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Acknowledgement mechanism for just-in-time delivery of load...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Address generation interlock detection

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Address generation interlock resolution under runahead...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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Address stage logic for generating speculative address...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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Advanced load address table entry invalidation based on...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Advanced load value check enhancement

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Alteration of functional unit partitioning scheme in...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Alteration of functional unit partitioning scheme in...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for decreasing the latency between an...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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Apparatus and method for facilitating out-of-order execution...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Apparatus and method for fast unified interrupt recovery and bra

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for guard outcome prediction

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for improved floating point exchange

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Apparatus and method for killing an instruction after...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for maintaining a floating point data...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for retiring instructions in excess of...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for selective control of condition code...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for superforwarding load operands in a...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Apparatus and method for tracking out of order load instructions

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Apparatus and method for two micro-operation flow using...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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