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Causality-based memory ordering in a multiprocessing...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Checking data type of operands specified by an instruction...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Clustered superscalar processor with communication control...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Clustered superscalar processor with communication control...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Command ordering among commands in multiple queues using...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Comparing operands of instructions against a replay...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Completion monitoring in a processor having multiple...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Completion table configured to track a larger number of...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Computer apparatus having special instructions to force...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Computer processing system employing an instruction reorder...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Computer processing system employing an instruction reorder...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Computer processor having a checker

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Computer processor with a replay system

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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Computer system having an instruction for probing memory...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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Computer system including a microprocessor having a reorder buff

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Computer system that operates in VLIW and superscalar modes...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Computer that selectively forces ordered execution of store and

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or...
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Concurrent execution of instructions in a processing system

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing
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Concurrent execution of multiple instructions in cyclic counter

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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Conditional move instruction formed into one decoded...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Reducing an impact of a stall or pipeline bubble
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