Reordering serial data in a system with parallel processing...

Details Reordering serial data in a system with parallel processing... Reordering serial data in a system with parallel processing...

2006-05-16

2006-05-16

Popovici, Dov (Department: 2181)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

Commitment control or register bypass

C712S215000, C712S028000

Reexamination Certificate

active

07047395

ABSTRACT:
A distributed system is provided for apportioning an instruction stream into multiple segments for processing in multiple parallel processing units, and for merging the processed segments into a single processed instruction stream having the same sequential relative order as the original instruction stream. Tags may be attached to each segment after apportioning to indicate the order in which the various segments are to be merged. In one embodiment, the end of each segment includes a tag indicating the unit to which the next instruction in the original instruction sequence is directed.

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patent: 6240509 (2001-05-01), Akkary
Patterson, David A. and John L. Hennessy. Computer Architecture A Quantitative Approach. 1996. Morgan Kaufmann Publishers, Inc. Second Edition. pp. 166-167, 173-174.

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