Scan chains for out-of-order load/store execution control

Details Scan chains for out-of-order load/store execution control Scan chains for out-of-order load/store execution control

1998-03-17

2000-03-14

An, Meng-Ai T.

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

712214, 712215, 712217, G06F 9312

Patent

active

060386576

ABSTRACT:
Scan logic which tracks the relative age of stores with respect to a particular load (or of loads with respect to a particular store) allows at processor to hold younger stores until the completion of older loads (or to hold younger loads until completion of older stores). Embodiments of propagate-kill style lookahead scan logic or of tree-structured, hierarchically-organized scan logic constructed in accordance with the present invention provide store older and load older indications with very few gate delays, even in processor embodiments adapted to concurrently evaluate large numbers of operations. Operating in conjunction with the scan logic, address matching logic allows the processor to more precisely tailor its avoidance of load-store (or store-load) dependencies. In a processor having a load unit and a store unit, a load/store execution control system allows load and store instructions to execute generally out-of-order with respect to each other while enforcing data dependencies between the load and store instructions.

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