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Double buffering of serial transfers

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double buffering operations between the memory bus and the expan

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Double data rate scheme for data output

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Double data rate scheme for data output

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Double data rate scheme for data output

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Double data rate synchronous dynamic random access memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double data rate synchronous memory with block-write

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double data rate synchronous SRAM with 100% bus utilization

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Double degraded array protection in an integrated network...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double density content addressable memory (CAM) lookup scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double density content addressable memory (CAM) lookup scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double density content addressable memory (CAM) lookup scheme

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Double-allocation data-replication system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Downgrade memory apparatus, and method for accessing a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Downloading programs to control a device

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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DQ mask to force internal data to mask external data in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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DRAM access command queuing

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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DRAM access command queuing structure

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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DRAM access method and a DRAM controller using the same

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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DRAM arbiter for video decoder

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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