DRAM access command queuing

Details DRAM access command queuing DRAM access command queuing

2011-03-22

2011-03-22

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S104000, C711SE12078

Reexamination Certificate

active

07913034

ABSTRACT:
Access arbiters are used to prioritize read and write access requests to individual memory banks in DRAM memory devices, particularly fast cycle DRAMs. This serves to optimize the memory bandwidth available for the read and the write operations by avoiding consecutive accesses to the same memory bank and by minimizing dead cycles. The arbiter first divides DRAM accesses into write accesses and read accesses. The access requests are divided into accesses per memory bank with a threshold limit imposed on the number of accesses to each memory bank. The write receive packets are rotated among the banks based on the write queue status. The status of the write queue for each memory bank may also be used for system flow control. The arbiter also typically includes the ability to determine access windows based on the status of the command queues, and to perform arbitration on each access window.

REFERENCES:
patent: 5327570 (1994-07-01), Foster et al.
patent: 5937428 (1999-08-01), Jantz
patent: 6137807 (2000-10-01), Rusu et al.
patent: 6260099 (2001-07-01), Gilbertson et al.
patent: 6523036 (2003-02-01), Hickman et al.
patent: 6526462 (2003-02-01), Elabd
patent: 6532509 (2003-03-01), Wolrich et al.
patent: 6539487 (2003-03-01), Fields et al.
patent: 6731559 (2004-05-01), Kawaguchi et al.
patent: 6938133 (2005-08-01), Johnson et al.
patent: 2003/0115403 (2003-06-01), Bouchard et al.
IBM Technical Disclosure Bulletin, vol. 33, No. 12, May 1991, “Processor/Memory Switch Which Maintains the Temporal Ordering of Requests”, pp. 293-296.

Affiliated with

Also associated with

Rating

DRAM access command queuing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with DRAM access command queuing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DRAM access command queuing will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2779086