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Cache coherence protocol for reducing the effects of false shari

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherence protocol with speculative writestream

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherence protocol with speculative writestream

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherence protocol with write-only permission

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherence unit for interconnecting multiprocessor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherence unit with integrated message passing and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency arrangement to enhance inbound bandwidth

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency control method and multi-processor system using

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency control method, chipset, and multi-processor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency controller of cache memory for maintaining data

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency detection in a bus bridge verification system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency for multiple independent cache of a domain

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency in a multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency in a shared-memory multiprocessor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency mechanism using an operation to be executed...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency mechanism using arbitration masks

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol employing a read operation...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol for a data processing system...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Cache coherency protocol having an imprecise hovering (H)...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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