Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-08-28
2007-08-28
McLean-Mayo, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S141000, C711S144000
Reexamination Certificate
active
10779839
ABSTRACT:
Distinguishing between snoops initiated internally with respect to a processing unit and snoops initiated externally with respect to a processing unit allows maintenance of cache coherency for a processing unit with multiple independent cache nits. A processing unit with multiple independent cache units, issues an externally initiated snoop to its cache units. Responses from the multiple independent cache units are the basis for a unified response provided to at least the initiator of the external snoop. An internally initiated snoop is communicated to the host system, and communicated to peer cache unit(s) within the processing unit.
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Darby & Darby P.C.
Marquis Thomas R.
McLean-Mayo Kimberly
Sun Microsystems Inc.
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