Cache coherence protocol with write-only permission

Details Cache coherence protocol with write-only permission Cache coherence protocol with write-only permission

2006-11-17

2010-02-02

Song, Jasmine (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S117000, C711S144000, C710S022000

Reexamination Certificate

active

07657710

ABSTRACT:
A system may include a processor node, and may also include an input/output (I/O) node including a processor and an I/O device. The processor and I/O nodes may each include a respective cache memory configured to cache a system memory and a respective cache coherence controller. The system may further include interconnect through which the nodes may communicate. In response to detecting a request for the I/O device to perform a DMA write operation to a coherence unit of the I/O node's respective cache memory, and in response to determining that the coherence unit is not modified with respect to the system memory and no other cache memory within the system has read or write permission corresponding to a copy of the coherence unit, the I/O node's respective cache coherence controller may grant write permission but not read permission for the coherence unit to the I/O node's respective cache memory.

REFERENCES:
patent: 6633958 (2003-10-01), Passint
patent: 6748498 (2004-06-01), Gharachorloo et al.
patent: 6868481 (2005-03-01), Gaither et al.
patent: 6874053 (2005-03-01), Yasuda et al.
patent: 6883070 (2005-04-01), Martin et al.
patent: 2005/0273545 (2005-12-01), Denneau et al.
patent: 2006/0026355 (2006-02-01), Okawa et al.
patent: 2006/0036809 (2006-02-01), Rudd
patent: 2006/0059317 (2006-03-01), Kakeda
patent: 2006/0095684 (2006-05-01), Shen
patent: 2006/0101209 (2006-05-01), Lais et al.
patent: 2006/0106995 (2006-05-01), Shen
patent: 2006/0230237 (2006-10-01), Sakamoto
patent: 2006/0248285 (2006-11-01), Petev
patent: 2006/0248286 (2006-11-01), Scott et al.
patent: 2008/0005485 (2008-01-01), Gilbert et al.

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