Cache coherency controller of cache memory for maintaining data

Details Cache coherency controller of cache memory for maintaining data Cache coherency controller of cache memory for maintaining data

1997-10-07

2000-09-19

Peikari, B. James

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

709102, 710200, 710216, G06F 1212, G06F 1216

Patent

active

061227129

ABSTRACT:
Disclosed is a cache coherency controller used in a multi-processor system. The cache coherency controller reflects a cache line including data produced by a preceding thread to a cache line including data produced by a succeeding thread. On the other hand, the cache coherency controller prevents a cache line including data produced by the succeeding thread from being reflected to the cache line including data produced by the preceding thread. The cache coherency controller maintains a sequential order (relationship) among threads based on a thread sequence information table and thereby maintains data anti-dependence.

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patent: 5812811 (1998-09-01), Dubey et al.
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