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Burst counter controller and method in a memory device...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Burst counter controller and method in a memory device...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Burst length detection circuit for detecting a burst end time po

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Burst length discriminating circuit for use in synchronous...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Burst mode implementation in a memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Burst mode type semiconductor memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Burst SRAMs for use with a high speed clock

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Burst suspend and resume with computer memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Burst transfer memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Burst write in a non-volatile memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Burst write in a non-volatile memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Burst write in a non-volatile memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Burst-loading of instructions into processor cache by execution

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Burst/pipelined edo memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Bus arbitration circuit responsive to latency of access...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Bus controller initiated write-through mechanism

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bus controller initiated write-through mechanism with...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bus frame protocol

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Bus interface buffer control in a microprocessor

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Bus interface controller for determining access counts

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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