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Directory-based cache coherency scheme for reducing memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Directory-based prediction methods and apparatus for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Disk array device with utilization of a dual-bus...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Distributed fault resilient shared memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Distributed memory addressing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Distributed processing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Distributed processor memory module and method

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Distributed processor memory module and method

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Distributed, scalable data storage facility with cache memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Double buffered flash programming

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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DRAM arbiter for video decoder

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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DSP code swapping with continuous DSP execution

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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DSP with distributed RAM structure

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual active bank memory controller

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual port memory for digital signal processor

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual port RAM communication protocol

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual port random access memory matching circuit for versa module

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual port shared memory system including semaphores for high pri

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual ported memory for a unified memory architecture

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Dual-ported electronic random access memory that does not...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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