Distributed memory addressing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

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709100, G06F 945

Patent

active

059705108

ABSTRACT:
A distributed memory addressing system has a plurality of separate processing elements. Each processing element has at least one CPU. A shared memory is utilized to store data to be used by the separate processing elements, as required. A high bandwidth interface interconnects processing elements and the shared memory. The high bandwidth interface is configured so as to provide non-blocking access to the shared memory for each of the processing elements.

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patent: 5384773 (1995-01-01), Olnowich et al.
patent: 5535373 (1996-07-01), Olnowich
patent: 5696922 (1997-12-01), Fromm

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