Cache intervention from only one of many cache lines sharing an
Cache intervention on a separate data bus when on-chip bus...
Cache invalidation bus for a highly scalable shared cache...
Cache isolation model
Cache line converter
Cache line duplication in response to a way prediction conflict
Cache line placement prediction for multiprocessor...
Cache line pre-load and pre-own based on cache coherence...
Cache line pre-load and pre-own based on cache coherence...
Cache line purge and update instruction
Cache line replacement policy enhancement to avoid memory...
Cache line replacement policy enhancement to avoid memory...
Cache line replacement techniques allowing choice of LFU or...
Cache line replacement techniques allowing choice of LFU or...
Cache line replacement techniques allowing choice of LFU or...
Cache line replacement techniques allowing choice of LFU or...
Cache line replacement threshold based on sequential hits or...
Cache line replacement using cable status to bias way selection
Cache line replacement using cache status to bias way selection
Cache lock device and method therefor