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Coherency protocol

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherency protocol for computer cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherency techniques for suspending execution of a thread...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent shared memory processing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent signal in a multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent signal in a multi-processor system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Coherent variable length reads which implicates multiple cache l

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Collaborative caching of a requested object by a lower level nod

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Combination flash memory and dram memory board interleave-bypass

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Combined buffer for snoop, store merging, load miss, and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Combined cache tag and data memory architecture

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Combined cache tag and data memory architecture

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Combined response cancellation for load command

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Command manager

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Communication network management apparatus using a cache arrange

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Communications system with multiple, simultaneous accesses to a

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Compare and exchange operation in a processing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Compiler having automatic common blocks of memory splitting

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Compiler-based cache line optimization

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Complete and concise remote (CCR) directory

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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