Cache addressing mechanism that adapts multi-dimensional address

Cache architecture to enable accurate cache sensitivity

Cache directory addressing scheme for variable cache sizes

Cache index based system address bus

Cache management instructions

Cache memory accessible for continuous data without tag...

Cache memory apparatus and central processor, hand-held...

Cache memory architecture with on-chip tag array and...

Cache memory capable of reducing area occupied by data...

Cache memory controlled by system address properties

Cache memory system

Cache memory system with reduced tag memory power consumption

Cache using perfect hash function

Cache with high access store bandwidth

Cache with multiway steering and modified cyclic reuse

Circuit and method for prefetching data for a texture cache

Circuit for placing a cache memory into low power mode in respon

Circuitry and method for relating first and second memory locati

Color correction method in a virtually addressed and physically

Computing system accessible to a split line on border of two pag