Cache management instructions

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories

Reexamination Certificate

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Details

C711S118000

Reexamination Certificate

active

06851010

ABSTRACT:
The invention is directed to techniques for managing a cache within a processor using one or more machine instructions. The machine instructions may perform one or more operations on the cache. For example, victimize instructions, allocate instructions, and pre-fetch instructions can be executed in the processor as part of cache management. Moreover, these various cache management instructions may be defined by one or more operands that specify memory addresses within main memory, rather than addresses or identifiers that define locations within the cache. For this reason, a programmer may invoke these cache management instructions to direct the management of the cache without knowing the specific location of data within the cache.

REFERENCES:
patent: 4135240 (1979-01-01), Ritchie
patent: 6076154 (2000-06-01), Van Eijndhoven et al.
patent: 6134633 (2000-10-01), Jacobs
patent: 6226715 (2001-05-01), Van Der Wolf et al.

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