Background fetching of translation lookaside buffer (TLB)...
Behavioral memory enabled fetch prediction mechanism within...
Behavioral memory mechanism for a data processing system
Bidirectional data storing method
BIOS memory address decoder for providing an extended BIOS memor
Block address translation circuit using two-bit to four-bit enco
Block storage memory management system and method utilizing inde
Block storage memory management system and method utilizing inde
Block-level and hash-based single-instance storage
Blocking processing restrictions based on addresses
Blocking processing restrictions based on page indices
Branch prediction method and apparatus
Buffer controller
Buffer memory configuration having a memory between a USB...
Buffer memory controller storing and extracting data of varying
Buffer page roll implementation for PCI-X block read...
Buffer pre-registration
Buffered memory module with implicit to explicit memory...
Burst access of registers at non-consecutive addresses using...
Burst address generator having two modes of operation employing